SPND

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Interpret as SPND

SPNDL=000

SPI Next-Access Delay Register

SPNDL	SPI Next-Access Delay Setting 0 (000): 1 RSPCK + 2 PCLK 1 (001): 2 RSPCK + 2 PCLK 2 (010): 3 RSPCK + 2 PCLK 3 (011): 4 RSPCK + 2 PCLK 4 (100): 5 RSPCK + 2 PCLK 5 (101): 6 RSPCK + 2 PCLK 6 (110): 7 RSPCK + 2 PCLK 7 (111): 8 RSPCK + 2 PCLK
Reserved	These bits are read as 00000. The write value should be 00000.

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